In a ripple carry adder, the carry from the previous stage should occur first to produce the sum and output carry of any stage. This causes a time delay in the addition process and is called **propagation delay** or ripple carry delay. The look-ahead carry addition is a method used to speed up the addition process by eliminating the propagation delay. The look-ahead carry adder anticipates the output carry of each stage.

We define two variables **Carry generate, C _{g}**, and

**Carry propagate, C**.

_{p}C_{g} occurs when an output carry is generated internally by the full adder. A carry is generated only when both inputs are 1s. It is expressed as the AND function of the two inputs.

Carry propagation function specifies when a carry-in would be propagated. C_{p} may be propagated by the full-adder when either or both of the inputs are 1s. It is hence expressed as the OR function of the two input bits. We write

The Output carry of a stage can be expressed in terms of C_{g} and C_{p} as

That is we get an output carry of 1 if it is generated by the full adder or if the adder propagates the input carry.

Circuit diagram for a full adder that produces Cg and Cp function is shown below

## 4 bit Carry Look Ahead Adder

Carry generation and carry propagation in terms of the input bits to a 4-bit adder is shown in the figure.

We can now write expressions for the output carry C_{out} of each full adder for the 4-bit example.

**Full Adder 1**

**Full Adder 2**

**Full Adder 3**

**Full Adder 4**

Observe that the output-carry for each stage is dependent only on the initial input carry C_{in1}, the C_{g} and C_{p} functions of that stage. Since C_{g} and C_{p} can be expressed in terms of A and B inputs to the full adder, all the output carries are available immediately. So we don’t have to wait for a carry to ripple through all the stages and there will be no propagation delay.