A full adder can be used to perform addition of two bits with an input carry. To add an N-bit number, multiple full adder circuits can be cascaded parallelly. Such an arrangement of full adders is called a **parallel adder**. N full adders are required to add n bits.

A **ripple-carry adder** is a parallel adder created by connecting carry output of each full-adder with the carry input of the next higher-order full-adder. The input carry should occur first to produce the sum and output carry of any stage (a stage is one full adder); this causes a time delay in the addition process.

## 4 bit Ripple Carry Adder

A 4-bit binary ripple-carry adder is shown in the figure.

Full-adder 1 (FA1) cannot produce a potential carry until an input carry is applied. Full-adder 2(FA2) cannot produce a potential output carry until FA1 produces an output carry, Full-adder 3(FA3) cannot produce a potential output carry until FA2 produces an output carry and so on. That is the input carry has to ripple through all the adders before a final sum is produced. This causes a time delay in the addition process and is called **propagation delay** or **ripple carry delay**.

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