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The Architecture of 8085 Microprocessor

The functional block diagram or the internal architecture of the 8085 microprocessor is shown in the figure.

8085 architecture functional block diagram
8085 Functional Block Diagram (Internal Architecture)

The functional blocks of an 8085 microprocessor are,

  • Registers.
    • General Purpose Registers.
    • Special Purpose Registers.
    • Flag Registers.
  • Arithmetic Logic Unit.
  • Instruction Register and Decoder.
  • Timing and Control Unit.
  • Address Buffer.
  • Address/Data Buffer.
  • Incrementer/Decrementer Address Latch.
  • Interrupt Control.
  • Serial I/O Control.


Registers are used by the microprocessor for temporary storage and manipulation of data and instructions.

General-purpose Registers

  • 6 general purpose registers – B, C, D, E, H and L.
  • Stores 8-bit data.
  • Can be used by the programmer.
  • Can be combined as register pairs- BC, DE and HL – to store 16-bit data.

Special Purpose Registers


  • 8-bit register.
  • Part of ALU.
  • Stores result of an operation.

Instruction Register(IR)

  • 8-bit register.
  • Hold the operation code of the instruction which is being decoded and executed.
  • Not programmable.

Program Counter(PC)

  • 16-bit register.
  • Stores the address of the next instruction.

Stack Pointer(SP)

  • 16-bit register.
  • Points to a memory location in R/W memory called the stack.
  • Beginning of the stack is defined by loading the address into SP.

Temporary Register and W and Z Registers

  • 8-bit register(s).
  • Used by microprocessor to store data temporarily.
  • Internally used for execution of instructions.
  • Cannot be accessed by the programmer.

Flag Registers

  • Flag registers are special purpose registers that indicate status conditions.
  • Flags are set or reset after an operation to indicate the data condition of the result.
flag registers in 8085
Flag registers
Flag Flag is set to 1 when
Z Zero The result is 0.
CY Carry An arithmetic operation results in carry.
S Sign Bit D7 of the result is 1.
P Parity The result has an even number of 1s.
AC AuxiliaryCarry A carry is generated by digit D3 and passed to digit D4. (Intermediate Carry)

Arithmetic and Logic Unit

  • Performs the computing functions.
  • It includes accumulator, temporary register, the arithmetic and logic circuits and five flags.

Instruction Register and Decoder

  • The instructions that is fetched from memory is loaded in the instruction register.
  • The decoder decodes the instruction and establishes the sequence of events to follow.

Address Buffer

  • 8-bit unidirectional bus.
  • Drive external high-order address bus. (A15 – A8)

Address/ Data Buffer

  • 8-bit bidirectional bus.
  • Drive multiplexed address/data bus. (AD7-A0)

Incrementer/ Decrementer Address Latch

  • 16-bit register.
  • Used to increment or decrement the contents of PC or SP.

Interrupt Control

  • Controls interrupts

Serial I/O Control

  • Provides control signals for serial communication.
  • SID- Serial Input Data.
  • SOD- Serial Output Data.

Timing and Control Unit

  • Synchronizes all the microoperations with the clock and generate control signals necessary for communication between microprocessor and peripherals.
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