A full adder accepts two input bits and an input carry and generates a sum and a carry, in its output. The logic symbol of a full adder is,

Truth table of a full adder is given below,

A | B | C_{in} | ∑ | C_{out} |
---|---|---|---|---|

0 | 0 | 0 | 0 | 0 |

0 | 0 | 1 | 1 | 0 |

0 | 1 | 0 | 1 | 0 |

0 | 1 | 1 | 0 | 1 |

1 | 0 | 0 | 1 | 0 |

1 | 0 | 1 | 0 | 1 |

1 | 1 | 0 | 0 | 1 |

1 | 1 | 1 | 1 | 1 |

Expression for Sum and Carry can be derived using the following K-Map.

A full adder should add C_{out} with other input bits A and B. We have used XOR operation to perform addition of two bits A and B. To add input carry, C_{in}, with the input bits, it must be XOR-ed with A⊕B. Logic expression for sum and carry can be derived from the truth table.

The expression for C_{out} can be simplified into

This means two XOR gates are used to implement full adder sum function. The first will generate A⊕B and the second will add this output with an input carry C_{in}. The complete logic circuit of a full adder will be,

## Implementation of Full Adder using Half Adders

A full adder can also be implemented using two half adder as follows.